788 lines
27 KiB
C++
788 lines
27 KiB
C++
// -*- mode: c++; c-basic-offset: 2; indent-tabs-mode: nil; -*-
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// Copyright (C) 2013 Henner Zeller <h.zeller@acm.org>
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//
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// This program is free software; you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation version 2.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://gnu.org/licenses/gpl-2.0.txt>
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#define __STDC_FORMAT_MACROS
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#include <inttypes.h>
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#include "gpio.h"
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#include <assert.h>
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#include <fcntl.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/mman.h>
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#include <time.h>
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#include <unistd.h>
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/*
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* nanosleep() takes longer than requested because of OS jitter.
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* In about 99.9% of the cases, this is <= 25 microcseconds on
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* the Raspberry Pi (empirically determined with a Raspbian kernel), so
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* we substract this value whenever we do nanosleep(); the remaining time
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* we then busy wait to get a good accurate result.
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*
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* You can measure the overhead using DEBUG_SLEEP_JITTER below.
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*
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* Note: A higher value here will result in more CPU use because of more busy
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* waiting inching towards the real value (for all the cases that nanosleep()
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* actually was better than this overhead).
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*
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* This might be interesting to tweak in particular if you have a realtime
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* kernel with different characteristics.
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*/
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#define EMPIRICAL_NANOSLEEP_OVERHEAD_US 12
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/*
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* In case of non-hardware pulse generation, use nanosleep if we want to wait
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* longer than these given microseconds beyond the general overhead.
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* Below that, just use busy wait.
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*/
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#define MINIMUM_NANOSLEEP_TIME_US 5
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/* In order to determine useful values for above, set this to 1 and use the
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* hardware pin-pulser.
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* It will output a histogram atexit() of how much how often we were over
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* the requested time.
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* (The full histogram will be shifted by the EMPIRICAL_NANOSLEEP_OVERHEAD_US
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* value above. To get a full histogram of OS overhead, set it to 0 first).
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*/
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#define DEBUG_SLEEP_JITTER 0
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// Raspberry 1 and 2 have different base addresses for the periphery
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#define BCM2708_PERI_BASE 0x20000000
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#define BCM2709_PERI_BASE 0x3F000000
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#define BCM2711_PERI_BASE 0xFE000000
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#define GPIO_REGISTER_OFFSET 0x200000
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#define COUNTER_1Mhz_REGISTER_OFFSET 0x3000
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#define GPIO_PWM_BASE_OFFSET (GPIO_REGISTER_OFFSET + 0xC000)
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#define GPIO_CLK_BASE_OFFSET 0x101000
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#define REGISTER_BLOCK_SIZE (4*1024)
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#define PWM_CTL (0x00 / 4)
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#define PWM_STA (0x04 / 4)
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#define PWM_RNG1 (0x10 / 4)
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#define PWM_FIFO (0x18 / 4)
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#define PWM_CTL_CLRF1 (1<<6) // CH1 Clear Fifo (1 Clears FIFO 0 has no effect)
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#define PWM_CTL_USEF1 (1<<5) // CH1 Use Fifo (0=data reg transmit 1=Fifo used for transmission)
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#define PWM_CTL_POLA1 (1<<4) // CH1 Polarity (0=(0=low 1=high) 1=(1=low 0=high)
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#define PWM_CTL_SBIT1 (1<<3) // CH1 Silence Bit (state of output when 0 transmission takes place)
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#define PWM_CTL_MODE1 (1<<1) // CH1 Mode (0=pwm 1=serialiser mode)
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#define PWM_CTL_PWEN1 (1<<0) // CH1 Enable (0=disable 1=enable)
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#define PWM_STA_EMPT1 (1<<1)
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#define PWM_STA_FULL1 (1<<0)
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#define CLK_PASSWD (0x5A<<24)
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#define CLK_CTL_MASH(x)((x)<<9)
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#define CLK_CTL_BUSY (1 <<7)
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#define CLK_CTL_KILL (1 <<5)
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#define CLK_CTL_ENAB (1 <<4)
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#define CLK_CTL_SRC(x) ((x)<<0)
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#define CLK_CTL_SRC_PLLD 6 /* 500.0 MHz */
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#define CLK_DIV_DIVI(x) ((x)<<12)
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#define CLK_DIV_DIVF(x) ((x)<< 0)
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#define CLK_PWMCTL 40
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#define CLK_PWMDIV 41
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// We want to have the last word in the fifo free
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#define MAX_PWM_BIT_USE 224
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#define PWM_BASE_TIME_NS 2
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// GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x).
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#define INP_GPIO(g) *(s_GPIO_registers+((g)/10)) &= ~(7ull<<(((g)%10)*3))
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#define OUT_GPIO(g) *(s_GPIO_registers+((g)/10)) |= (1ull<<(((g)%10)*3))
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#define GPIO_SET *(gpio+7) // sets bits which are 1 ignores bits which are 0
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#define GPIO_CLR *(gpio+10) // clears bits which are 1 ignores bits which are 0
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// We're pre-mapping all the registers on first call of GPIO::Init(),
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// so that it is possible to drop privileges afterwards and still have these
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// usable.
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static volatile uint32_t *s_GPIO_registers = NULL;
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static volatile uint32_t *s_Timer1Mhz = NULL;
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static volatile uint32_t *s_PWM_registers = NULL;
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static volatile uint32_t *s_CLK_registers = NULL;
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namespace rgb_matrix {
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#define GPIO_BIT(x) (1ull << x)
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GPIO::GPIO() : output_bits_(0), input_bits_(0), reserved_bits_(0),
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slowdown_(1)
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#ifdef ENABLE_WIDE_GPIO_COMPUTE_MODULE
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, uses_64_bit_(false)
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#endif
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{
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}
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gpio_bits_t GPIO::InitOutputs(gpio_bits_t outputs,
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bool adafruit_pwm_transition_hack_needed) {
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if (s_GPIO_registers == NULL) {
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fprintf(stderr, "Attempt to init outputs but not yet Init()-ialized.\n");
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return 0;
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}
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// Hack: for the PWM mod, the user soldered together GPIO 18 (new OE)
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// with GPIO 4 (old OE).
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// Since they are connected inside the HAT, want to make extra sure that,
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// whatever the outside system set as pinmux, the old OE is _not_ also
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// set as output so that these GPIO outputs don't fight each other.
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//
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// So explicitly set both of these pins as input initially, so the user
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// can switch between the two modes "adafruit-hat" and "adafruit-hat-pwm"
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// without trouble.
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if (adafruit_pwm_transition_hack_needed) {
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INP_GPIO(4);
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INP_GPIO(18);
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// Even with PWM enabled, GPIO4 still can not be used, because it is
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// now connected to the GPIO18 and thus must stay an input.
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// So reserve this bit if it is not set in outputs.
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reserved_bits_ = GPIO_BIT(4) & ~outputs;
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}
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outputs &= ~(output_bits_ | input_bits_ | reserved_bits_);
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#ifdef ENABLE_WIDE_GPIO_COMPUTE_MODULE
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const int kMaxAvailableBit = 45;
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uses_64_bit_ |= (outputs >> 32) != 0;
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#else
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const int kMaxAvailableBit = 31;
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#endif
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for (int b = 0; b <= kMaxAvailableBit; ++b) {
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if (outputs & GPIO_BIT(b)) {
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INP_GPIO(b); // for writing, we first need to set as input.
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OUT_GPIO(b);
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}
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}
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output_bits_ |= outputs;
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return outputs;
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}
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gpio_bits_t GPIO::RequestInputs(gpio_bits_t inputs) {
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if (s_GPIO_registers == NULL) {
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fprintf(stderr, "Attempt to init inputs but not yet Init()-ialized.\n");
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return 0;
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}
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inputs &= ~(output_bits_ | input_bits_ | reserved_bits_);
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#ifdef ENABLE_WIDE_GPIO_COMPUTE_MODULE
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const int kMaxAvailableBit = 45;
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uses_64_bit_ |= (inputs >> 32) != 0;
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#else
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const int kMaxAvailableBit = 31;
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#endif
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for (int b = 0; b <= kMaxAvailableBit; ++b) {
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if (inputs & GPIO_BIT(b)) {
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INP_GPIO(b);
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}
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}
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input_bits_ |= inputs;
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return inputs;
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}
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// We are not interested in the _exact_ model, just good enough to determine
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// What to do.
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enum RaspberryPiModel {
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PI_MODEL_1,
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PI_MODEL_2,
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PI_MODEL_3,
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PI_MODEL_4
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};
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static int ReadFileToBuffer(char *buffer, size_t size, const char *filename) {
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const int fd = open(filename, O_RDONLY);
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if (fd < 0) return -1;
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ssize_t r = read(fd, buffer, size - 1); // assume one read enough
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buffer[r >= 0 ? r : 0] = '\0';
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close(fd);
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return r;
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}
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static RaspberryPiModel DetermineRaspberryModel() {
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char buffer[4096];
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if (ReadFileToBuffer(buffer, sizeof(buffer), "/proc/cpuinfo") < 0) {
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fprintf(stderr, "Reading cpuinfo: Could not determine Pi model\n");
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return PI_MODEL_3; // safe guess fallback.
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}
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static const char RevisionTag[] = "Revision";
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const char *revision_key;
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if ((revision_key = strstr(buffer, RevisionTag)) == NULL) {
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fprintf(stderr, "non-existent Revision: Could not determine Pi model\n");
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return PI_MODEL_3;
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}
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unsigned int pi_revision;
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if (sscanf(index(revision_key, ':') + 1, "%x", &pi_revision) != 1) {
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fprintf(stderr, "Unknown Revision: Could not determine Pi model\n");
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return PI_MODEL_3;
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}
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// https://www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/README.md
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const unsigned pi_type = (pi_revision >> 4) & 0xff;
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switch (pi_type) {
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case 0x00: /* A */
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case 0x01: /* B, Compute Module 1 */
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case 0x02: /* A+ */
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case 0x03: /* B+ */
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case 0x05: /* Alpha ?*/
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case 0x06: /* Compute Module1 */
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case 0x09: /* Zero */
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case 0x0c: /* Zero W */
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return PI_MODEL_1;
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case 0x04: /* Pi 2 */
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return PI_MODEL_2;
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case 0x11: /* Pi 4 */
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return PI_MODEL_4;
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default: /* a bunch of versions represneting Pi 3 */
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return PI_MODEL_3;
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}
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}
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static RaspberryPiModel GetPiModel() {
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static RaspberryPiModel pi_model = DetermineRaspberryModel();
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return pi_model;
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}
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static int GetNumCores() {
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return GetPiModel() == PI_MODEL_1 ? 1 : 4;
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}
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static uint32_t *mmap_bcm_register(off_t register_offset) {
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off_t base = BCM2709_PERI_BASE; // safe fallback guess.
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switch (GetPiModel()) {
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case PI_MODEL_1: base = BCM2708_PERI_BASE; break;
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case PI_MODEL_2: base = BCM2709_PERI_BASE; break;
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case PI_MODEL_3: base = BCM2709_PERI_BASE; break;
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case PI_MODEL_4: base = BCM2711_PERI_BASE; break;
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}
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int mem_fd;
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if ((mem_fd = open("/dev/mem", O_RDWR|O_SYNC) ) < 0) {
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// Try to fall back to /dev/gpiomem. Unfortunately, that device
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// is implemented in a way that it _only_ supports GPIO, not the
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// other registers we need, such as PWM or COUNTER_1Mhz, which means
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// we only can operate with degraded performance.
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//
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// But, instead of failing, mmap() then silently succeeds with the
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// unsupported offset. So bail out here.
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if (register_offset != GPIO_REGISTER_OFFSET)
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return NULL;
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mem_fd = open("/dev/gpiomem", O_RDWR|O_SYNC);
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if (mem_fd < 0) return NULL;
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}
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uint32_t *result =
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(uint32_t*) mmap(NULL, // Any adddress in our space will do
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REGISTER_BLOCK_SIZE, // Map length
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PROT_READ|PROT_WRITE, // Enable r/w on GPIO registers.
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MAP_SHARED,
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mem_fd, // File to map
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base + register_offset // Offset to bcm register
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);
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close(mem_fd);
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if (result == MAP_FAILED) {
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perror("mmap error: ");
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fprintf(stderr, "MMapping from base 0x%lx, offset 0x%lx\n",
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base, register_offset);
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return NULL;
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}
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return result;
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}
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static bool mmap_all_bcm_registers_once() {
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if (s_GPIO_registers != NULL) return true; // alrady done.
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// The common GPIO registers.
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s_GPIO_registers = mmap_bcm_register(GPIO_REGISTER_OFFSET);
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if (s_GPIO_registers == NULL) {
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return false;
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}
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// Time measurement. Might fail when run as non-root.
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uint32_t *timereg = mmap_bcm_register(COUNTER_1Mhz_REGISTER_OFFSET);
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if (timereg != NULL) {
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s_Timer1Mhz = timereg + 1;
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}
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// Hardware pin-pulser. Might fail when run as non-root.
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s_PWM_registers = mmap_bcm_register(GPIO_PWM_BASE_OFFSET);
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s_CLK_registers = mmap_bcm_register(GPIO_CLK_BASE_OFFSET);
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return true;
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}
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bool GPIO::Init(int slowdown) {
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slowdown_ = slowdown;
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// Pre-mmap all bcm registers we need now and possibly in the future, as to
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// allow dropping privileges after GPIO::Init() even as some of these
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// registers might be needed later.
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if (!mmap_all_bcm_registers_once())
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return false;
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gpio_set_bits_low_ = s_GPIO_registers + (0x1C / sizeof(uint32_t));
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gpio_clr_bits_low_ = s_GPIO_registers + (0x28 / sizeof(uint32_t));
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gpio_read_bits_low_ = s_GPIO_registers + (0x34 / sizeof(uint32_t));
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#ifdef ENABLE_WIDE_GPIO_COMPUTE_MODULE
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gpio_set_bits_high_ = s_GPIO_registers + (0x20 / sizeof(uint32_t));
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gpio_clr_bits_high_ = s_GPIO_registers + (0x2C / sizeof(uint32_t));
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gpio_read_bits_high_ = s_GPIO_registers + (0x38 / sizeof(uint32_t));
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#endif
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return true;
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}
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/*
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* We support also other pinouts that don't have the OE- on the hardware
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* PWM output pin, so we need to provide (impefect) 'manual' timing as well.
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* Hence all various busy_wait_nano() implementations depending on the hardware.
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*/
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// --- PinPulser. Private implementation parts.
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namespace {
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// Manual timers.
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class Timers {
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public:
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static bool Init();
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static void sleep_nanos(long t);
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};
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// Simplest of PinPulsers. Uses somewhat jittery and manual timers
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// to get the timing, but not optimal.
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class TimerBasedPinPulser : public PinPulser {
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public:
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TimerBasedPinPulser(GPIO *io, gpio_bits_t bits,
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const std::vector<int> &nano_specs)
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: io_(io), bits_(bits), nano_specs_(nano_specs) {
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if (!s_Timer1Mhz) {
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fprintf(stderr, "FYI: not running as root which means we can't properly "
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"control timing unless this is a real-time kernel. Expect color "
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"degradation. Consider running as root with sudo.\n");
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}
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}
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virtual void SendPulse(int time_spec_number) {
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io_->ClearBits(bits_);
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Timers::sleep_nanos(nano_specs_[time_spec_number]);
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io_->SetBits(bits_);
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}
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private:
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GPIO *const io_;
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const gpio_bits_t bits_;
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const std::vector<int> nano_specs_;
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};
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static bool LinuxHasModuleLoaded(const char *name) {
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FILE *f = fopen("/proc/modules", "r");
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if (f == NULL) return false; // don't care.
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char buf[256];
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const size_t namelen = strlen(name);
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bool found = false;
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while (fgets(buf, sizeof(buf), f) != NULL) {
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if (strncmp(buf, name, namelen) == 0) {
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found = true;
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break;
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}
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}
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fclose(f);
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return found;
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}
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static void busy_wait_nanos_rpi_1(long nanos);
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static void busy_wait_nanos_rpi_2(long nanos);
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static void busy_wait_nanos_rpi_3(long nanos);
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static void busy_wait_nanos_rpi_4(long nanos);
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static void (*busy_wait_impl)(long) = busy_wait_nanos_rpi_3;
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// Best effort write to file. Used to set kernel parameters.
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static void WriteTo(const char *filename, const char *str) {
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const int fd = open(filename, O_WRONLY);
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if (fd < 0) return;
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(void) write(fd, str, strlen(str)); // Best effort. Ignore return value.
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close(fd);
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}
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// By default, the kernel applies some throtteling for realtime
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// threads to prevent starvation of non-RT threads. But we
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// really want all we can get iff the machine has more cores and
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// our RT-thread is locked onto one of these.
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// So let's tell it not to do that.
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static void DisableRealtimeThrottling() {
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if (GetNumCores() == 1) return; // Not safe if we don't have > 1 core.
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// We need to leave the kernel a little bit of time, as it does not like
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// us to hog the kernel solidly. The default of 950000 leaves 50ms that
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// can generate visible flicker, so we reduce that to 1ms.
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WriteTo("/proc/sys/kernel/sched_rt_runtime_us", "999000");
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}
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bool Timers::Init() {
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if (!mmap_all_bcm_registers_once())
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return false;
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// Choose the busy-wait loop that fits our Pi.
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switch (GetPiModel()) {
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case PI_MODEL_1: busy_wait_impl = busy_wait_nanos_rpi_1; break;
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case PI_MODEL_2: busy_wait_impl = busy_wait_nanos_rpi_2; break;
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case PI_MODEL_3: busy_wait_impl = busy_wait_nanos_rpi_3; break;
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case PI_MODEL_4: busy_wait_impl = busy_wait_nanos_rpi_4; break;
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}
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DisableRealtimeThrottling();
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// If we have it, we run the update thread on core3. No perf-compromises:
|
|
WriteTo("/sys/devices/system/cpu/cpu3/cpufreq/scaling_governor",
|
|
"performance");
|
|
return true;
|
|
}
|
|
|
|
static uint32_t JitterAllowanceMicroseconds() {
|
|
// If this is a Raspberry Pi with more than one core, we add a bit of
|
|
// additional overhead measured up to the 99.999%-ile: we can allow to burn
|
|
// a bit more busy-wait CPU cycles to get the timing accurate as we have
|
|
// more CPU to spare.
|
|
switch (GetPiModel()) {
|
|
case PI_MODEL_1:
|
|
return EMPIRICAL_NANOSLEEP_OVERHEAD_US; // 99.9%-ile
|
|
case PI_MODEL_2: case PI_MODEL_3:
|
|
return EMPIRICAL_NANOSLEEP_OVERHEAD_US + 35; // 99.999%-ile
|
|
case PI_MODEL_4:
|
|
return EMPIRICAL_NANOSLEEP_OVERHEAD_US + 10; // this one is fast.
|
|
}
|
|
return EMPIRICAL_NANOSLEEP_OVERHEAD_US;
|
|
}
|
|
|
|
void Timers::sleep_nanos(long nanos) {
|
|
// For smaller durations, we go straight to busy wait.
|
|
|
|
// For larger duration, we use nanosleep() to give the operating system
|
|
// a chance to do something else.
|
|
|
|
// However, these timings have a lot of jitter, so if we have the 1Mhz timer
|
|
// available, we use that to accurately mesure time spent and do the
|
|
// remaining time with busy wait. If we don't have the timer available
|
|
// (not running as root), we just use nanosleep() for larger values.
|
|
|
|
if (s_Timer1Mhz) {
|
|
static long kJitterAllowanceNanos = JitterAllowanceMicroseconds() * 1000;
|
|
if (nanos > kJitterAllowanceNanos + MINIMUM_NANOSLEEP_TIME_US*1000) {
|
|
const uint32_t before = *s_Timer1Mhz;
|
|
struct timespec sleep_time = { 0, nanos - kJitterAllowanceNanos };
|
|
nanosleep(&sleep_time, NULL);
|
|
const uint32_t after = *s_Timer1Mhz;
|
|
const long nanoseconds_passed = 1000 * (uint32_t)(after - before);
|
|
if (nanoseconds_passed > nanos) {
|
|
return; // darn, missed it.
|
|
} else {
|
|
nanos -= nanoseconds_passed; // remaining time with busy-loop
|
|
}
|
|
}
|
|
} else {
|
|
// Not running as root, not having access to 1Mhz timer. Approximate large
|
|
// durations with nanosleep(); small durations are done with busy wait.
|
|
if (nanos > (EMPIRICAL_NANOSLEEP_OVERHEAD_US + MINIMUM_NANOSLEEP_TIME_US)*1000) {
|
|
struct timespec sleep_time
|
|
= { 0, nanos - EMPIRICAL_NANOSLEEP_OVERHEAD_US*1000 };
|
|
nanosleep(&sleep_time, NULL);
|
|
return;
|
|
}
|
|
}
|
|
|
|
busy_wait_impl(nanos); // Use model-specific busy-loop for remaining time.
|
|
}
|
|
|
|
static void busy_wait_nanos_rpi_1(long nanos) {
|
|
if (nanos < 70) return;
|
|
// The following loop is determined empirically on a 700Mhz RPi
|
|
for (uint32_t i = (nanos - 70) >> 2; i != 0; --i) {
|
|
asm("nop");
|
|
}
|
|
}
|
|
|
|
static void busy_wait_nanos_rpi_2(long nanos) {
|
|
if (nanos < 20) return;
|
|
// The following loop is determined empirically on a 900Mhz RPi 2
|
|
for (uint32_t i = (nanos - 20) * 100 / 110; i != 0; --i) {
|
|
asm("");
|
|
}
|
|
}
|
|
|
|
static void busy_wait_nanos_rpi_3(long nanos) {
|
|
if (nanos < 20) return;
|
|
for (uint32_t i = (nanos - 15) * 100 / 73; i != 0; --i) {
|
|
asm("");
|
|
}
|
|
}
|
|
|
|
static void busy_wait_nanos_rpi_4(long nanos) {
|
|
if (nanos < 20) return;
|
|
// Interesting, the Pi4 is _slower_ than the Pi3 ? At least for this busy loop
|
|
for (uint32_t i = (nanos - 5) * 100 / 132; i != 0; --i) {
|
|
asm("");
|
|
}
|
|
}
|
|
|
|
#if DEBUG_SLEEP_JITTER
|
|
static int overshoot_histogram_us[256] = {0};
|
|
static void print_overshoot_histogram() {
|
|
fprintf(stderr, "Overshoot histogram >= empirical overhead of %dus\n"
|
|
"%6s | %7s | %7s\n",
|
|
JitterAllowanceMicroseconds(), "usec", "count", "accum");
|
|
int total_count = 0;
|
|
for (int i = 0; i < 256; ++i) total_count += overshoot_histogram_us[i];
|
|
int running_count = 0;
|
|
for (int us = 0; us < 256; ++us) {
|
|
const int count = overshoot_histogram_us[us];
|
|
if (count > 0) {
|
|
running_count += count;
|
|
fprintf(stderr, "%s%3dus: %8d %7.3f%%\n", (us == 0) ? "<=" : " +",
|
|
us, count, 100.0 * running_count / total_count);
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
// A PinPulser that uses the PWM hardware to create accurate pulses.
|
|
// It only works on GPIO-12 or 18 though.
|
|
class HardwarePinPulser : public PinPulser {
|
|
public:
|
|
static bool CanHandle(gpio_bits_t gpio_mask) {
|
|
#ifdef DISABLE_HARDWARE_PULSES
|
|
return false;
|
|
#else
|
|
const bool can_handle = gpio_mask==GPIO_BIT(18) || gpio_mask==GPIO_BIT(12);
|
|
if (can_handle && (s_PWM_registers == NULL || s_CLK_registers == NULL)) {
|
|
// Instead of silently not using the hardware pin pulser and falling back
|
|
// to timing based loops, complain loudly and request the user to make
|
|
// a choice before continuing.
|
|
fprintf(stderr, "Need root. You are configured to use the hardware pulse "
|
|
"generator "
|
|
"for\n\tsmooth color rendering, however the necessary hardware\n"
|
|
"\tregisters can't be accessed because you probably don't run\n"
|
|
"\twith root permissions or privileges have been dropped.\n"
|
|
"\tSo you either have to run as root (e.g. using sudo) or\n"
|
|
"\tsupply the --led-no-hardware-pulse command-line flag.\n\n"
|
|
"\tExiting; run as root or with --led-no-hardware-pulse\n\n");
|
|
exit(1);
|
|
}
|
|
return can_handle;
|
|
#endif
|
|
}
|
|
|
|
HardwarePinPulser(gpio_bits_t pins, const std::vector<int> &specs)
|
|
: triggered_(false) {
|
|
assert(CanHandle(pins));
|
|
assert(s_CLK_registers && s_PWM_registers && s_Timer1Mhz);
|
|
|
|
#if DEBUG_SLEEP_JITTER
|
|
atexit(print_overshoot_histogram);
|
|
#endif
|
|
|
|
if (LinuxHasModuleLoaded("snd_bcm2835")) {
|
|
fprintf(stderr,
|
|
"\n%s=== snd_bcm2835: found that the Pi sound module is loaded. ===%s\n"
|
|
"Don't use the built-in sound of the Pi together with this lib; it is known to be\n"
|
|
"incompatible and cause trouble and hangs (you can still use external USB sound adapters).\n\n"
|
|
"See Troubleshooting section in README how to disable the sound module.\n"
|
|
"You can also run with --led-no-hardware-pulse to avoid the incompatibility,\n"
|
|
"but you will have more flicker.\n"
|
|
"Exiting; fix the above first or use --led-no-hardware-pulse\n\n",
|
|
"\033[1;31m", "\033[0m");
|
|
exit(1);
|
|
}
|
|
|
|
for (size_t i = 0; i < specs.size(); ++i) {
|
|
// Hints how long to nanosleep, already corrected for system overhead.
|
|
sleep_hints_us_.push_back(specs[i]/1000 - JitterAllowanceMicroseconds());
|
|
}
|
|
|
|
const int base = specs[0];
|
|
// Get relevant registers
|
|
fifo_ = s_PWM_registers + PWM_FIFO;
|
|
|
|
if (pins == GPIO_BIT(18)) {
|
|
// set GPIO 18 to PWM0 mode (Alternative 5)
|
|
SetGPIOMode(s_GPIO_registers, 18, 2);
|
|
} else if (pins == GPIO_BIT(12)) {
|
|
// set GPIO 12 to PWM0 mode (Alternative 0)
|
|
SetGPIOMode(s_GPIO_registers, 12, 4);
|
|
} else {
|
|
assert(false); // should've been caught by CanHandle()
|
|
}
|
|
InitPWMDivider((base/2) / PWM_BASE_TIME_NS);
|
|
for (size_t i = 0; i < specs.size(); ++i) {
|
|
pwm_range_.push_back(2 * specs[i] / base);
|
|
}
|
|
}
|
|
|
|
virtual void SendPulse(int c) {
|
|
if (pwm_range_[c] < 16) {
|
|
s_PWM_registers[PWM_RNG1] = pwm_range_[c];
|
|
|
|
*fifo_ = pwm_range_[c];
|
|
} else {
|
|
// Keep the actual range as short as possible, as we have to
|
|
// wait for one full period of these in the zero phase.
|
|
// The hardware can't deal with values < 2, so only do this when
|
|
// have enough of these.
|
|
s_PWM_registers[PWM_RNG1] = pwm_range_[c] / 8;
|
|
|
|
*fifo_ = pwm_range_[c] / 8;
|
|
*fifo_ = pwm_range_[c] / 8;
|
|
*fifo_ = pwm_range_[c] / 8;
|
|
*fifo_ = pwm_range_[c] / 8;
|
|
*fifo_ = pwm_range_[c] / 8;
|
|
*fifo_ = pwm_range_[c] / 8;
|
|
*fifo_ = pwm_range_[c] / 8;
|
|
*fifo_ = pwm_range_[c] / 8;
|
|
}
|
|
|
|
/*
|
|
* We need one value at the end to have it go back to
|
|
* default state (otherwise it just repeats the last
|
|
* value, so will be constantly 'on').
|
|
*/
|
|
*fifo_ = 0; // sentinel.
|
|
|
|
/*
|
|
* For some reason, we need a second empty sentinel in the
|
|
* fifo, otherwise our way to detect the end of the pulse,
|
|
* which relies on 'is the queue empty' does not work. It is
|
|
* not entirely clear why that is from the datasheet,
|
|
* but probably there is some buffering register in which data
|
|
* elements are kept after the fifo is emptied.
|
|
*/
|
|
*fifo_ = 0;
|
|
|
|
sleep_hint_us_ = sleep_hints_us_[c];
|
|
start_time_ = *s_Timer1Mhz;
|
|
triggered_ = true;
|
|
s_PWM_registers[PWM_CTL] = PWM_CTL_USEF1 | PWM_CTL_PWEN1 | PWM_CTL_POLA1;
|
|
}
|
|
|
|
virtual void WaitPulseFinished() {
|
|
if (!triggered_) return;
|
|
// Determine how long we already spent and sleep to get close to the
|
|
// actual end-time of our sleep period.
|
|
//
|
|
// TODO(hzeller): find if it is possible to get some sort of interrupt from
|
|
// the hardware once it is done with the pulse. Sounds silly that there is
|
|
// not (so far, only tested GPIO interrupt with a feedback line, but that
|
|
// is super-slow with 20μs overhead).
|
|
if (sleep_hint_us_ > 0) {
|
|
const uint32_t already_elapsed_usec = *s_Timer1Mhz - start_time_;
|
|
const int to_sleep_us = sleep_hint_us_ - already_elapsed_usec;
|
|
if (to_sleep_us > 0) {
|
|
struct timespec sleep_time = { 0, 1000 * to_sleep_us };
|
|
nanosleep(&sleep_time, NULL);
|
|
|
|
#if DEBUG_SLEEP_JITTER
|
|
{
|
|
// Record histogram of realtime jitter how much longer we actually
|
|
// took.
|
|
const int total_us = *s_Timer1Mhz - start_time_;
|
|
const int nanoslept_us = total_us - already_elapsed_usec;
|
|
int overshoot = nanoslept_us - (to_sleep_us + JitterAllowanceMicroseconds());
|
|
if (overshoot < 0) overshoot = 0;
|
|
if (overshoot > 255) overshoot = 255;
|
|
overshoot_histogram_us[overshoot]++;
|
|
}
|
|
#endif
|
|
}
|
|
}
|
|
|
|
while ((s_PWM_registers[PWM_STA] & PWM_STA_EMPT1) == 0) {
|
|
// busy wait until done.
|
|
}
|
|
s_PWM_registers[PWM_CTL] = PWM_CTL_USEF1 | PWM_CTL_POLA1 | PWM_CTL_CLRF1;
|
|
triggered_ = false;
|
|
}
|
|
|
|
private:
|
|
void SetGPIOMode(volatile uint32_t *gpioReg, unsigned gpio, unsigned mode) {
|
|
const int reg = gpio / 10;
|
|
const int mode_pos = (gpio % 10) * 3;
|
|
gpioReg[reg] = (gpioReg[reg] & ~(7 << mode_pos)) | (mode << mode_pos);
|
|
}
|
|
|
|
void InitPWMDivider(uint32_t divider) {
|
|
assert(divider < (1<<12)); // we only have 12 bits.
|
|
|
|
s_PWM_registers[PWM_CTL] = PWM_CTL_USEF1 | PWM_CTL_POLA1 | PWM_CTL_CLRF1;
|
|
|
|
// reset PWM clock
|
|
s_CLK_registers[CLK_PWMCTL] = CLK_PASSWD | CLK_CTL_KILL;
|
|
|
|
// set PWM clock source as 500 MHz PLLD
|
|
s_CLK_registers[CLK_PWMCTL] = CLK_PASSWD | CLK_CTL_SRC(CLK_CTL_SRC_PLLD);
|
|
|
|
// set PWM clock divider
|
|
s_CLK_registers[CLK_PWMDIV]
|
|
= CLK_PASSWD | CLK_DIV_DIVI(divider) | CLK_DIV_DIVF(0);
|
|
|
|
// enable PWM clock
|
|
s_CLK_registers[CLK_PWMCTL]
|
|
= CLK_PASSWD | CLK_CTL_ENAB | CLK_CTL_SRC(CLK_CTL_SRC_PLLD);
|
|
}
|
|
|
|
private:
|
|
std::vector<uint32_t> pwm_range_;
|
|
std::vector<int> sleep_hints_us_;
|
|
volatile uint32_t *fifo_;
|
|
uint32_t start_time_;
|
|
int sleep_hint_us_;
|
|
bool triggered_;
|
|
};
|
|
|
|
} // end anonymous namespace
|
|
|
|
// Public PinPulser factory
|
|
PinPulser *PinPulser::Create(GPIO *io, gpio_bits_t gpio_mask,
|
|
bool allow_hardware_pulsing,
|
|
const std::vector<int> &nano_wait_spec) {
|
|
if (!Timers::Init()) return NULL;
|
|
if (allow_hardware_pulsing && HardwarePinPulser::CanHandle(gpio_mask)) {
|
|
return new HardwarePinPulser(gpio_mask, nano_wait_spec);
|
|
} else {
|
|
return new TimerBasedPinPulser(io, gpio_mask, nano_wait_spec);
|
|
}
|
|
}
|
|
|
|
// For external use, e.g. in the matrix for extra time.
|
|
uint32_t GetMicrosecondCounter() {
|
|
if (s_Timer1Mhz) return *s_Timer1Mhz;
|
|
|
|
// When run as non-root, we can't read the timer. Fall back to slow
|
|
// operating-system ways.
|
|
struct timespec ts;
|
|
clock_gettime(CLOCK_MONOTONIC, &ts);
|
|
const uint64_t micros = ts.tv_nsec / 1000;
|
|
const uint64_t epoch_usec = (uint64_t)ts.tv_sec * 1000000 + micros;
|
|
return epoch_usec & 0xFFFFFFFF;
|
|
}
|
|
|
|
} // namespace rgb_matrix
|